1. Field of the Invention
The present invention relates to a field effect type semiconductor device having a gate electrode and a method of fabricating the same.
2. Description of the Background Art
In an a field effect type semiconductor device such as an MESFET (Metal Semiconductor FET) composed of an III-V group compound semiconductor including GaAs or an HEMT (High Electron Mobility Transistor), a gate electrode which is brought into Schottky contact with an operating layer composed of a semiconductor is used.
FIG. 17 is a schematic cross-sectional view showing one example of a conventional field effect transistor. The field m effect transistor is an MESFET.
In FIG. 17, high-concentration regions 32 and 33 each composed of an n.sup.+ layer are formed with predetermined spacing in the surface of a GaAs substrate 31, and an operating layer 34 composed of an n layer is formed between the high-concentration regions 32 and 33. The operating layer 34 functions as a channel. A gate electrode 35 composed of Ti/Pt/Au, f or example, is formed on the operating layer 34, and a source electrode 36 and a drain electrode 37 are respectively formed on the high-concentration regions 32 and 33.
In the field effect transistor shown In FIG. 17, the thickness of a depletion layer 38 formed under the gate electrode 35 can be changed by a gate voltage applied to the gate electrode 35. Consequently, the thickness of the channel is changed, so that a drain current flowing between the source and the drain can be controlled.
In the conventional field effect transistor, such a phenomenon called a gate-lag that a drain current gently rises may occur when the gate voltage applied to the gate electrode 35 rises, thereby decreasing phase noise characteristics and high-power characteristics.
The following points are considered as the cause of the gate-lag. Carriers captured in a trap level 39 on the surface of GaAs enlarge the depletion layer to narrow the channel, so that the drain current decreases in an initial state where the gate voltage rises. Thereafter, the channel extends as the carriers captured in the trap level 39 are gradually discharged from the channel, so that the drain current attains its normal value.
Furthermore, a Fermi level on the surface of GaAs varies by the gate voltage applied to the gate electrode 35. Consequently, the carriers are charged to the trap level 39 on the surface of GaAs, or the carriers captured in the trap level 39 are discharged from the channel. As a result, the drain current varies.
In order to improve characteristics on the surface of GaAs, an attempt to form a high-concentration n layer on the surface of the operation layer 4, cause the surface of the operating layer 4 to have a blocking function of minority carriers, and prevent majority carriers and minority carriers from being recombined on the surface of GaAs has been made.
In order to form the high-concentration n layer on the surface of GaAs, however, the height of a Schottky barrier on the surface of the operating layer with the gate electrode decreases, resulting in degraded gate withstand voltage characteristics.